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AN891 APPLICATION NOTE SMPS WITH L4990 FOR MULTISYNC MONITORS
by CW Park & G. Gattavari
This paper can be used as design guide of a flyback converter for monitors power supply. The high performance PWM controller L4990 is being used to meet new spec requirements for monitors power supply. The basic requirements of a monitor power supply are listed below: - high output power range up to 120W, with universal mains voltage - synchronisation up to 100kHz - power management - over voltage and over load protections - easy design, simple, with lower components count The L4990 is a current mode controller developed to implement single-ended topologies, off-line flyback and forward, and DC- DC converters at fix frequency, up to 1MHz. This device includes some additional features as programmable soft start, sync in/out, disable (to be used for overvoltage and overcurrent detection), maximum duty cycle control and hiccup Figure 1: Current mode control
overcurrent protection. Due to the integration of the listed functions , very often used in monitors power supplies, the component count is dramatically reduced . The L4990 allows to design high performance power supplies for high end monitors, as 17" and 21" and also low cost power supplies for low end monitors, as 14" and 15".
BASIC CIRCUITS AND OPERATION 1. CURRENT MODE CONTROL The L4990 is based on a current mode architecture. Fig. 1 shows the current mode control circuit in a typical flyback converter. A clock signal initiates the power pulse at a frequency fixed by the oscillator. The output of the error amplifier and the primary current are compared at the inputs of the PWM comparator that generates the PWM signal.
VSUPPLY CLOCK VREF + E/A + PWM COMP R
VOUT
S LATCH
Q
RSENSE
D96IN383
July 1999
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AN891 APPLICATION NOTE
2. START- UP CIRCUITRY AND AUXILIARY SUPPLY Fig. 2 shows a couple of circuit solutions on how to wake-up the device at mains turn-on. Figure 2a: Low cost start-up. 3. OSCILLATOR AND SYNCHRONISATION FUNCTIONS (PINS 2,1,4,15). Fig. 3 shows oscillator and sync circuits. The oscillator frequency is given by the following formula:
f
1.44 Rt Ct
Figure 3: Oscillator with synchronisation.
Rin
SYNC DC-LIM
Cin
VCC L4990
VREF 1 15
4
RSENSE
D96IN384
OSC
2
TIMING
T
INTERNAL CLOCK PULSE
D96IN386
Figure 2b: Very low consumption start-up. Figure 4: Oscillator and sync waveforms.
V 3V
1V
R03 R04
Q01
D02 Cin VCC L4990
V
t
Q02 ZD01
V REF
3.5V
SYNC PULSE
D96IN385
t V SYNC OSCILL
Fig2-a is well suited to applications with fixed mains, 110 or 220Vac; it's the cheapest and largely used system to start-up an IC with hysteretic turn-on. Fig2-b is suggested for quick start-up and for autoranging applications keeping constant the wake-up time, having low consumption after device turn-on. ZD01 is fixing the emitter voltage of Q1 that has to be higher than the turn-on threshold max. value. When the device turns-on, the auxiliary supply will keep the voltage across Cin at a typ. value of 13V while VREF rising from 0 to it's nominal value of 5V will saturate Q2 turning-off Q1. At this point the current consumption from the mains it's only due to R4, typically above 400k for 220VAC mains.
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1V t
VPIN10 VOLTAGE AT PIN 10 WHEN PIN 15 = GND
t
VPIN10
VOLTAGE AT PIN 10 WHEN PIN 15 = VREF
D96IN387
t
AN891 APPLICATION NOTE
The oscillator can be synchronised by a voltage pulse sent to pin1. When the voltage at pin 1 reaches 3,5V max., Ct is discharged and a clock pulse is generated. Fig. 4 shows the correspondent voltage waveforms. According to Fig 4, when pin 15 is connected to Vref, the internal latch divide by two the oscillator frequency, and the switching frequency of the power section became the half (and the max. duty cycle is limited to 50%). This possibility conveniently reduces the switching losses; in particular we suggest to ground pin15 from 31 to 48KHz, and pin15 to Vref when operating from 56 to 100KHz, as summarised below: 31KHz to 48KHz: pin 15 to gnd, same frequency as sync input. 56KHz to 100KHz: pin 15 to Vref, half of sync frequency. 4. ERROR AMPLIFIER (PIN 5, PIN 6) Using a feedback with optocoupler, as in monitor applications, there are available two solutions: a) by controlling the output of the error amplifier directly with the optotransistor; b) using the on-board error amplifier; For this application we choose solution a), reducing the component count, as shown in Fig 5. Figure 5: Voltage feedback loop.
L4990
+ E/A 2.5V
Figure 6: Over voltage protection.
R12 DIS 8 14
VCC
R13
L4990
D96IN389
monitor the auxiliary supply through R12 and R13. After a disable function intervention, to reset the IC, the VCC pin has to be forced below the UVLO threshold (10V), or the user has to disconnect the mains. 6. CURRENT SENSE AND OVERLOAD PROTECTION (PIN 13, 7) The current sense function is implemented at pin13, detecting the voltage drop on the sensing resistor R10. The threshold voltage at pin13 is of 1V, while in normal operation is lower. When the voltage at this pin reaches 1,2V, a fault condition is detected. The power MOS is immediately turned-off, and the fault signal is internally latched. A fault reset delay is implemented by discharging the external Soft -Start (SS) timing capacitor before resetting the fault latch and initiating a new soft start cycle. In case of continuous fault condition, the SS capacitor is charged at 5V before being discharged again, to that on the power elements, power MOS and secondary diodes, the power dissipation is kept under safety limits. Figure 7: Current sensing.
5
VFB R54 PC01
14V R53
6 COMP
C08
D96IN388
5. OVER VOLTAGE PROTECTION (PIN 14) At pin 14 is present a disable function. When the voltage at this pin is higher than 2.5V, the device is latched, and the device current consumption is lower than 300A. This pin is typically used to monitor the rectified mains or the auxiliary supply, or overcurrents too. In the current application this function is used to
-
50V
R55 C61 TL431 R58
L4990
10 7 SS C09 13 ISEN
OUT R08
R11 1K R10
D96IN390
C05 470pF
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AN891 APPLICATION NOTE
DESIGN OF FLYBACK CONVERTER FOR MONITOR APPLICATIONS 1. BASIC REQUIREMENTS OF A 15" MONITOR APPLICATION Switching frequency - standby or off mode : 25kHz - free running mode : 28kHz - normal mode : 31kHz to 64kHz Mains voltage range : 85V to 264V AC Operating in - discontinuous mode at 31kHz - continuous and discontinuous mixed mode at higher than 31kHz. Nominal output power : 80W Output voltage and power - V1 for H-Def : 50V, 50W - V2 for Video Amp : 80V, 12W - V3, -V4 for V-Def : 14V, 12V 10W - V5 for heater : 6.3V, 4W
secondaryis:
N=
Ns1
NP
=
Vo1 + VDf 50 + 1 = = 0.567 VR 90
A popular ferrite core as the EER424215 with 1mm air gap has been chosen.
AL 0.28 H/Np2.
The primary turns are so calculated:
NP =
L P = = 39T 425 AL 0.28
Ns1= Np 0.567 = 22 T The voltage per turn, VT, is:
VT =
1-1. Transformer Calculation duty cycle ,dc : 50% max. at minimum mains and nominal output power condition. efficiency : 0.85 Vi min : 100V DC period T : 32s Vdss of Mos-Fet : 600V The peak drain voltage of power Mos-Fet is given by:
Vo1 + 1 50 + 1 = 2.32V. 22 Ns1
Taking 13 to 14V from Nd auxiliary winding for L4990 auto-supply, the Nd turns are calculated below:
Nd =
13 + VDf 13 + 1 = 6 T. VT 2.32
In the following table is represented the final spec of the transformer, in which all the turns windings have been adjusted a bit to optimise each output voltage:
Winding Np Pin 1 to3 8 to 7 15 to 16 15 to 17 11 to 12 10 to 11 13 to 14 Turns 40 6 21 33 7 6 4
Vdsspeak = Vinmax + VR + Vspike,
where VR is the secondary to primary reflected voltage. Considering a 15% of safety margin on Vdss, Vdssmax results in 600V 0.85 = 510V ; Vinmax = 264 370V, and considering a 2 Vspike = 50V, VR = Vdssmax - Vinmax - Vspike = 510 - 370 - 50 = 90V The primary inductance is given by the formula:
Nd Ns1 (50V) Ns2 (80V) Ns3 (14V) Ns4 (-12V) Ns5 (6.3V)
LP =
(Vimin T dc)2 (100 32 0.5)2 = 2 PO T 2 80 32 0.85 = 425H
and the primary current is given by:
1-2. Vdss voltage clamp circuit Fig 8 shows the Vdss voltage clamp network. The secondary reflected voltage and the voltage spike due to the leakage inductance, are charging C10 through D05; R18, connected in parallel, is discharging C10. The power dissipation on R18 is given by :
IP =
Vimin T dc 100 32 0.5 = 3.76A = LP 425
PR18 =
V2C10
R18
=
1002 = 0.45W 22000
The transformer turn ratio between primary and
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When all the outputs are open, at no load, this
AN891 APPLICATION NOTE
power consumption is operating as a dummy load and all the output voltages remain at its nominal value. Figure 8: Vdss clamp circuit. The turn-on initialisation restarts, and an unwanted intermittence operation will be established. In particular, for autoranging applications and when a high start-up capacitor value is required, it is recommended the use of a quick start-up, as shown in fig2-b, in order to keep almost constant the start-up time on all the operating mains range. 1-5. Current sense When the voltage at ISEN (pin 13) reaches 1V, the current limiting function is activated. The peak voltage at ISEN input has been calculated to be 0.85V at nominal output power (for some margin for load transients) and min. switching frequency (31kHz). Rs, current sense resistor, is calculated here below:
C10
R18 D05
L4990 10
OUT R08
Q01
R10
D96IN391
1-3. Over- voltage protection The turn-on threshold voltage of the device is 17V max.. So, the OVP intervention is fixed by the formula:
Rs =
0.85V
IP
=
0.85V
3.76A
0.22
R12 + R13 R12 + R13 VOVP = V14 = 2.5V R13 R13
When R12=33K and R13=5.1K, the OVP intervention starts at 18.7V. If Vo1 winding is strictly coupled with the auxiliary winding, OVP intervention happen at 69V of Vo1, 38% above the nominal value. Adjustments can be done by changing the R12 and R13 values, or Nd turns or by recalculating the Volt/turns. The VSUPPLY, device supply voltage provided by the power transformer after turn-on , in normal conditions, is:
VSUPPLY = V o1 + V D
The max. primary peak current ILIMIT is :
ILIMIT =
1V 3.76A = 4.42A 0.85V
The max. output power Po LIMIT, at 31kHz, is :
ILIMIT 4.42 PoLIMIT = Po = 80 = 110W Ip 3.76
The available output power is higher at higher switching frequency. 1-6. Voltage feedback loop For a good secondary regulation is requested the use of an optocoupler and a secondary voltage reference with an error amplifier too. The output source current of the error amplifier, pin 6, is 1.3mA typical. The sink current capability of PC01 has to be higher, at least 3 mA. The secondary to primary feedback is stabilising the Vo1 output, by sensing it before the LC filter to avoid possible instabilities. C61 is introducing a pole in the origin, and the series of C59 and R56 is effective to suppress high frequency parasitic oscillations. 1-7. Power management a) Normal mode The control input of Q72 and Q74 are both high. So, Q71, Q73 and Q75 are in saturation. The Horiz. and vertical processors work
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2
2
Ns1
ND - V D =
50 + 1
21
6 -1 = 13.6 V
1-4. Decoupling capacitor on Vcc supply line and start up C04, capacitor in parallel to the supply voltage of the device, is charged by the external start-up circuit, up to the turn-on threshold. It has to be large enough (we chose 470F) to hold the device supply voltage, in open load conditions. During load transients, from nominal to no load, the output Vo1 has some overvoltages and L4990 turns-off the power transistor until Vo1 recovers it's nominal value. If C04 is not big enough, the supply voltage can cross the turn-off threshold, turning-off the device.
AN891 APPLICATION NOTE
with a supply voltage of 14V and -12V. b) Suspend mode The control input of Q74 is low and high for Q72. So, Q73 and Q75 are off. H/V deflection is stopped, MCU and heater are working. c) Off mode All control inputs are low, and Q71, Q73 and Q75 are off. There is no supply for heater and H/V processors. The power consumption of this mode depends on the load current of the 80V output. The total input power consumption, in this mode, is 2.0W at the following conditions: AC 220V input, 80V output open, 50V output 0.25W dummy, MCU current 20mA from unswitched 14V output. The power consumption is 1.3W increased by degaussing coil circuit consumption. It is possible to keep at less than 4W the total power consumption if power losses due to the leakage current on the 80V output is less than 0.5W. 1-8. Oscillator and synchronisation The device oscillator frequency is set at 25KHz. The synchronisation is obtained by the flyback pulse from FBT via R17and a zener diode for voltage clamping. 1-9. Circuit diagram Fig.9 shows the complete schematic diagram for a 15" monitor application, and Figg. 10 a and b show the relative PCB layout. Fig. 11 shows the transformer specification.
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C11 4700pF 4KV C12
F01 AC 250V T3.15A BD01 R01 3.3 D52 80V 17 D53 50V C62 100F 100V Q71 C71 R71 R72 Q72 OFF NOR SUSPEND 14V UNSWITCHED Q73 C74 R73 +50V PC01 C08 2.2nF VR51 10K R55 18K C61 0.022F R58 1.2K 16V ZD71 16V C59 0.01F R56 100 Q74 Q75 -12V SWITCHED R75 14V SWITCHED C58 47F 25V HEATER CONTROL 16 R51 C53 3 7 D54 15 14 C54 220F 100V C52 100F 100V C03 220F 400V R18 33K C10 0.1F 200V R19 4.7M 1 R20 4.7M 18
LF01
P1 AC IM
C01 0.1F
C02 0.1F
R03 10K D05 BYW13 600 D02 1N4148 D04 RGP100 R07 47 R12 33K R06 27 8 D55 C04 470F 14 8 R08 22 10 R09 5.6K R11 1K 13 C05 470pF R10 0.22 R54 1K R53 4.7K 10 D56 R52 47 11 Q01 STP6 NA60FI C56 470F 25V C57 470F 25V 9 13 12 C55 470F 16V
R04 470K
Q01 KSP45
GND
Q02 KTC1815Y
6.3V
ZD01 20V
R13 4.7K
R05 10K
C07 1F
4
15
R05 10K
Figure 9: Complete PS. schematic diagram for 15" monitor.
2
C06 6800pF
5
L4990
12 11 R21 100 6
SYNC IN
R17 1K
1
ZD02 5.6V
7
C09 0.01F
R74 H/V DEF. CONTROL SUSPEND OFF NOR
Q51 TL431
D96IN392B
AN891 APPLICATION NOTE
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AN891 APPLICATION NOTE
Figure 10a: Printed Circuit Board Layout.(Overlay)(Dimensions: 182mm x 77.5mm).
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AN891 APPLICATION NOTE
Figure 10b: Printed Circuit Board Layout. (Bottom Layer) (Dimensions 182mm x 77.5mm).
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AN891 APPLICATION NOTE
TRANSFORMER SPECIFICATION FOR 15" MULTISYNC MONITOR Transformer specification CORE: EER424215 BOBBIN: VERT. 18 PIN TOP BARRIER: 3mm BOTTOM BARRIER: 6mm Lp (1 - 4): 425H Winding specification
W/D Ns4 Ns5 Ns6 Nd Np1/2 Ns1 Np1/2 Ns2 Ns3 WIRE (mm) 0.5 0.5 0.5 0.3 0.16 * 12 0.16 * 12 0.16 * 12 0.3 0.3 S-F 10 - 11 11 - 12 13 - 14 7-8 1-2 15 - 16 2-4 16 - 17 17 - 18 TURNS 6 7 4 6 20 21 20 12 29 SOLENOID SOLENOID AFTER Ns3 SPACE AFTER Ns4 SPACE 1 LAYER SOLENOID SOLENOID SOLENOID SOLENOID SOLENOID AFTER Ns2 METHOD TAPE 0.05 * 10 0.05 * 15 0.05 * 26 0.05 * 26 0.05 * 26 0.05 * 26 0.05 * 26 0.05 * 15 0.05 * 26 Ts 1 1 3 3 3 3 3 1 3
2. MEASUREMENT DATA 2-1. Efficiency at 70W, nominal output power Mains Voltage 90Vac at 31KHz at 64KHz
86.8W 86.1W 80.6% 81.3% 110Vac 84.1W 83.8W 83.2% 83.5% 220Vac 80.3W 79.8W 87.1% 87.7% 270Vac 80.0W 80.5W 87.4% 86.9% where in W is indicated the input power consumption at a load of 70W, and in % is indicated the system efficiency. 2-2. Power consumption when in off mode Conditions : 50V - 5mA, 14V- 20mA and all remaining outputs open. Mains Voltage : Power consum.: 90Vac 1.7W 110Vac 1.7W 220Vac 2.0W 270Vac 2.2W
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AN891 APPLICATION NOTE
3. MAIN CHARACTERISTICS OF A 17" MONITOR APPLICATION Switching frequency : - stand-by or off mode : 25KHz - free-running mode : 28KHz - normal mode : 31KHz to 82KHz Nominal output power : 90W Output voltage and power - V1 for H-Def : 200V, 65W - V2 for Video Amp : 80V, 10W - V3, -V4 for V-Def : +14V, -12V 10W - V5 for Heater : 6.3V, 5W output, the Vr is not anymore critical. At this point we can review also the VR value, choosing less than 100V. Considering VR = 95V and Vdp = 515V, the new value of Vspike is:
Vspike = 515V - 100V - 370V = 45V
Now, to limit again Vspike less than 45V, it is very important to reduce the transformer leakage inductance . Figure 11: Rectifier circuits for 200V and 80V outputs.
200V D52
3-1. Transformer calculation duty cycle, dc : 50% max. at min. mains voltage and nominal load efficiency : 85% Vimin : 100V DC period T : 32s Vdss of Mos-Fet : 600V The peak drain voltage of the power Mos-Fet is given by : Vdp = Vimax + VR + Vspike The maximum value of VR has to be equal or lower than Vimin to avoid negative Vdss generated by ringing when the transformer has no energy. Higher VR is chosen, higher Vdss is required for power Mos-Fet; but high VR means also Vr, reverse voltage, for the secondary rectifier of the 200V output. The peak reverse voltage of secondary diode is :
D53 80V R51 C54 220F 100V GND
D96IN393
C53
The primary transformer inductance is:
Lp =
(Vimin T dc)2 (100 32 0.5)2 = 2 PO T 2 90 32 0.85 380H
and the primary current becomes:
Vr =
Vimax Vout + Vout+ Vspike VR
Ip =
Vimin T dc 100 32 0.5 = 4.2A = 380 Lp
where Vspike is the voltage spike on the secondary winding. Considering VR = 100V and Vspike = 150V, the Vr of the diode located on the 200V output results in :
The turn ratio between primary and secondary winding is:
N=
Ns1 + Ns2 Vo1 + 2 VDf 200 + 2 = = = 2.12 Np VR 95
Vr =
370V 200V + 200V + 150V = 1090V 100V
We chose the ferrite core EER424215 with 1.0 mm air gap.
This reverse voltage, greater than 1000V, is effectively too high for a fast recovery rectifier diode. Fig 11 shows a method to reduce the required reverse voltage. Using this simple system to generate the 200V
AL 0.28 H/Np2 L 380 NP = p = = 37 T A 0.28 L
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AN891 APPLICATION NOTE
Considering 13 to 14V the auxiliary winding to supply the L4990, the number of turns is calculated as follows:
Ns1 + Ns2 = Np 2.12 = 79 T
Ns1 =
(120 + 1) 79 = 47 T 200 + 2
Nd =
13 + VDf 14 = =6T VT 2.56
Ns2 = 79 - 47 = 32 T The volt/turn VT is:
VT =
Vo1 + 2
Ns1
=
200 +2 = 2.56 V 79
The following paragraph shows the detailed transformer windings spec and fig. 12 shows the schematic diagram of the complete power supply.
TRANSFORMER SPECIFICATION FOR 17" MULTISYNC MONITOR Transformer specification CORE: EER424215 BOBBIN: VERT. 18 PIN TOP BARRIER: 3mm BOTTOM BARRIER: 6mm Winding specification
W/D Ns4 Ns5 Ns6 Nd Np1/2 Ns1 Ns2 Np1/2 WIRE (mm) 0.5 0.5 0.5 0.3 0.16 * 12 0.45 0.45 0.16 * 12 S-F 10 - 11 11 - 12 13 - 14 7-8 1-2 15 - 16 17 - 18 2-4 TURNS 5 6 3 6 20 32 47 17 SOLENOID SOLENOID AFTER Ns3 SPACE AFTER Ns4 SPACE 1 LAYER SOLENOID SOLENOID SOLENOID SOLENOID METHOD TAPE 0.05 * 10 0.05 * 15 0.05 * 26 0.05 * 26 0.05 * 26 0.05 * 26 0.05 * 15 0.05 * 26 Ts 1 1 3 3 3 3 1 3
3. MEASUREMENT DATA 3-1. Efficiency at 90W, nominal output power Mains Voltage at 31KHz at 82KHz 90Vac 112.7W 117.8W 79.9% 76.4% 110Vac 108W 112.5W 83.3% 80.0% 220Vac 102W 108.1W 88.2% 83.3% 270Vac 102.1W 108.5W 88.1% 82.9% 3-2. Power consumption when in off mode Conditions : 0.5W on 12V and all remaining outputs open. Mains Voltage : 90Vac 110Vac 220Vac 270Vac Power consum.: 1.8W 1.8W 2.6W 3.3W
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C11 4700pF 4KV C12
F01 AC 250V T3.15A BD01 R01 3.3 C02 0.1F C03 220F 400V D53 80V C62 100F 100V Q71 6.3V R07 47 R13 4.7K R06 27 8 13 12 D55 Q72 C04 470F 4 R08 22 2 R09 5.6K R11 1K 13 C05 470pF R10 0.22 R54 1K R53 4.7K 10 D56 5 10 Q01 STP7 NA60FI 11 15 8 14 9 OFF NOR SUSPEND Q73 R52 47 C58 47F 25V R73 VR51 22K R55 68K Q51 TL431 R58 1K C61 0.022F ZD71 16V R012 33K C55 470F 16V C71 R71 R72 HEATER CONTROL 16 R51 C53 3 7 15 14 D54 C54 220F 160V C52 100F 250V R18 33K C10 0.1F 200V 17 R19 4.7M 1 D52 200V R20 4.7M 18
LF01
Figure 12: SMPS for 17" monitor.
P1 AC IM
C01 0.1F
R03 10K R04 470K D02 1N4148 D04 RGP100 Q01 KSP45 D05 BYW13 -600
GND
Q02 KTC1815Y
R05 10K
SUMMARY A practical flyback SMPS for 15" and 17" multisync monitors has been analysed, incorporating all the requested features for a correct functionality in normal operating conditions and stand-by
C56 470F 25V C57 470F 25V
C07 1F
R05 10K
C06 6800pF
L4990
12 11
SYNC IN 1
R017 1K
C74
R75
14V UNSWITCHED 14V SWITCHED
ZD02 5.6V 7 6 PC1 C08 2.2nF R21 100
C09 0.1F
C59 0.01F R56 100 Q74
Q75
-12V SWITCHED
R74 H/V DEF. CONTROL SUSPEND OFF NOR
mode. By using the L4990 the component count is minimised, reducing the overall system cost and complexity.
D96IN394B
AN891 APPLICATION NOTE
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AN891 APPLICATION NOTE
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics (c) 1999 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com
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